1. Field of the Invention
The present invention relates to a display device and a method of driving a display device, and more particularly, to a liquid crystal display (LCD) device and a method of driving an LCD device.
2. Background of the Related Art
In general, an LCD device includes two substrates that are spaced apart and face each other, and a liquid crystal material layer interposed between the two substrates. Each of the substrates includes electrodes that face each other, wherein a voltage supplied to each of the electrodes induces an electric field to the liquid crystal material layer. Accordingly, alignment of liquid crystal molecules of the liquid crystal material layer is changed by varying an intensity or direction of the induced electric field, thereby changing light transmissivity through the liquid crystal material layer. Thus, the LCD device displays images by varying the induced electric field.
FIG. 1 is a block diagram of an LCD device according to the related art, and FIG. 2 is a schematic view of a liquid crystal panel of FIG. 1.
As shown in FIG. 1, an LCD device includes an interface 10, a timing controller 12, a voltage generating portion 14, a gamma reference voltage portion 16, data and gate driving portions 18 and 20 respectively, and a liquid crystal panel 2.
The interface 10 is supplied with, among other things, data signals and synchronizing signals from a driving system, for example, a computer system. The interface 10 supplies those signals to the timing controller 12. Interface 10 may be a low voltage differential signal (LVDS) interface, a transistor-transistor logic (TTL) interface or other similar devices.
The liquid crystal panel 2 includes, as shown in FIG. 2, a plurality of gate lines GL1 to GLn and a plurality of data lines DL1 to DLm. The gate and data lines GL and DL, respectively, are each connected to a pixel P, which includes a pixel transistor T and a liquid crystal capacitor CL.
The timing controller 12 generates and supplies control signals to the data and gate driving portions 18 and 20, respectively, and the timing controller 12 supplies data signals to the data driving portion 18.
The gamma reference voltage portion 16 supplies a gamma reference voltage to a digital-to-analog converter (DAC) (not shown) of the data driving portion 18.
The data driving portion 18 generates a data voltage corresponding to the data signal using the gamma reference, and supplies the generated data voltage to the data line DL. The gate driving portion 20 supplies gate voltages having on- or off-levels to the gate lines GL1 to GLn. Each of the gate lines GL1 to GLn is sequentially selected during a horizontal period. The selected gate line GL is supplied with the “ON” gate voltage and the non-selected gate line GL is supplied with the “OFF” gate voltage. When the gate line GL is selected with the “ON” gate voltage, the pixel transistor T connected to the selected gate line GL is turned on, and the data voltage is supplied to the liquid crystal capacitor CL.
The voltage generating portion 14 generates and supplies the voltages driving each of the components of the LCD device as shown in FIG. 1.
In the above explained LCD device, gate and data driving portions 18 and 20, respectively, have a plurality of drivers using integrated chips (ICs). The data and gate driver ICs are bonded to the liquid crystal panel 2 through gate and data pads (not shown) thereon using tape carrier packing (TCP) method or chip on film (COF) method.
FIG. 3 is a view of a gate driver of an LCD device according to the related art.
As shown in FIG. 3, a gate driver 20 using an integrated chip (IC) is supplied with driving voltages and control signals. Driving voltages include, among other things, high gate voltage VGH, a low gate voltage VGL, a positive supply voltage VCC, and a negative supply voltage VEE. Control signals include, among other things, a gate start pulse GSP, a gate shift clock GSC, and a gate output enable GOE.
The high and low gate voltages VGH and VGL are on and off gate voltages, respectively. The positive and negative supply voltages VCC and VEE, respectively, are source voltages driving the gate driver 20.
The gate start pulse GSP is a signal notifying a start gate line, for example, a first gate line GL1. The gate shift clock GSC is a signal notifying a turn-on time of a pixel transistor T. The gate output enable GOE is a signal controlling a voltage output of the gate driver 20.
Gate driver 20 using the gate driving voltages and the gate control signals are arranged in one side of the LCD panel 2 (in FIG. 1). Accordingly, the gate driving voltages and the gate control signals are transferred through the gate driver and lines linking adjacent data drivers.
As explained above, the related art LCD device uses a gate driver using integrated chips (ICs). Accordingly, separate ICs for the gate driver and separate processes for bonding the gate driver to the liquid crystal panel are required, thus rendering production processes more complex and increasing production costs. Furthermore, a larger space for the gate and data pads is needed to bond the ICs to the liquid crystal panel.
Furthermore, the plurality of driving voltages and control signals used to drive a plurality of gate driver ICs require long wires for transferring the driving voltages and the control signals. Accordingly, power consumption increases, and driving circuit reliability is reduced.